Job Title: Senior Technical Staff Engineer
Location: Ottawa, ON
Employment Type: Direct hire.
Industry: Semiconductor Manufacturing
Compensation: $153,000 - $203,000 /year.
Schedule: 40 hrs/Week.
About the Opportunity:
- The Timing and Communication Group (TCG) is seeking a highly seasoned Senior Technical Staff Engineer.
- Analog Design to provide technical leadership and architectural direction across the development of advanced analog and mixed-signal IPs for next-generation timing solutions.
- This position goes beyond block-level design.
- Define architecture, specifications, and design methodologies for high-performance analog IPs, including PLLs, DLLs, ADCs, DACs, high-speed I/O interfaces, and other critical IPs used in TCG timing products.
- Drive top-level mixed-signal system architecture, ensuring robust integration of analog blocks within complex SoC environments.
Why You'll Love Working Here:
- Supportive, team-driven culture that values collaboration, transparency, and accountability.
- Opportunity to grow your career with a global workforce solutions leader serving multiple industries.
- People-first environment that encourages employees to bring their authentic selves to work.
- Strong focus on partnership, innovation, and delivering meaningful results for clients and candidates.
Why This Opportunity is Exciting:
This role offers the chance to join a company that prioritizes both people and performance-where your contributions directly impact client success while giving you room to grow and develop professionally.
About Acara Solutions
Acara is a premier recruiting and workforce solutions provider-we help companies compete for talent. With a legacy of experience across industries worldwide, we partner with clients, listen to their needs, and customize visionary talent solutions that drive the business outcomes they seek. We leverage decades of experience to deliver contingent staffing, direct placement, executive search, and workforce services worldwide.
Sound like a good fit?
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What You'll Do:
- Provide senior-level guidance to the analog team; mentor junior and mid-level designers through design reviews, modeling strategy, simulation methodology, and silicon bring-up.
- Serve as a technical thought leader by influencing design tradeoffs, modeling strategies, and verification approaches across projects.
- Lead transistor-level design and advanced simulations for critical analog circuits across process corners and operating conditions.
- Develop behavioral and Verilog-A models that ensure fast, accurate representation of analog IPs within mixed-signal SoC simulations.
- Guide silicon validation, test planning, characterization, and system-level lab evaluation for new analog IP blocks.
- Partner closely with architects, digital/mixed-signal teams, product engineers, layout teams, and multi-site groups to ensure cohesive, first-pass success of designs.
- Influence product roadmap and contribute to long-term analog IP strategy.