Responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications. Assumes full ownership of DV tasks and delivers high-quality results.
-Develop test plans at block, sub-system, and chip level. Execute SoC-based verification at full chip.
-Write C-based lib packages and tests. Architect and implement scalable and reusable test benches using SystemVerilog and UVM.
-Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.
-Automating the test environment for randomized testing and scoreboarding. Utilize advanced debugging techniques to identify and resolve design and verification issues.
-Perform root-cause analysis and work with design teams to fix identified issues. Define and track functional and code coverage metrics to ensure thorough verification.
-Ensure that verification quality meets or exceeds industry standards and project requirements.